Job summary

Takes care of the synthesis, place and route and physical layout of the digital part of the ASIC.

Key responsibilities & tasks

1. Outlines the floor plan of the digital part of the ASIC.
2. Runs Synthesis on RTL code including clock tree synthesis optimizing timing
3. Runs Place and Route on synthesized netlist optimizing area
4. Adds scan based testability to digital design
5. Translates an ASIC digital design into an area and power optimized physical layout
6. Takes responsibility for the quality of the layout and defines as such the layout guidelines
7. Shares design / layout experiences with other digital backend engineers and/or design teams of the company.
8. Contributes to the achievement of the quality objectives as stated in the quality policy of AnSem.

Job Requirements

Education/experience:

• Degree in electrical engineering or equivalent experience
• 6 years prior experience in digital backend design is required.

Mandatory competences

• Technical: A basic knowledge of digital electronics
• Language: Fluency in English, both written and spoken.
• Personal:
• Excellent problem solving and analytical skills
• Excellent planning & organizing skills
• Able to work in a team
• Stress-resistant and result-oriented

Desirable

• Experience on synthesis and P&R in technologies smaller than 40nm

Offer

• An international environment with a winning appetite and focus on quality.
• AnSem offers plenty of training & development initiatives to ensure your growth!
• An attractive remuneration package with several extra-legal benefits such as group insurance, hospitalization insurance, meal vouchers, bonus etc.
• Our headquarter offices are situated at the Researchpark in Heverlee, Belgium. We have a second design center in the Kennispark in Enschede, The Netherlands.